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CH32V002F4P6 Pinout (TSSOP20)

CH32V002 is the successor to the popular CH32V003: the same price and pin layout, but twice the RAM (4 kB) and more peripheral remap options.

CH32V002F4P6 in the TSSOP20 package is pin-compatible with the CH32V003F4P6 – boards and circuits carry over unchanged, except that the CH32V002 has no op-amp.

Specifications

  • RISC-V (QingKe) at 48 MHz
  • 16 kB flash, 4 kB SRAM
  • 18 GPIO, ADC
  • USART, I2C, SPI, timers, PWM
  • 3.3 V or 5 V supply
  • single-wire programming (SWIO on PD1)
  • TSSOP20 package

It is programmed with the WCH-LinkE. The table lists every remap option for each pin – the V002 has more of them than the V003.

Pinout and pin table

Hover over a pin in the diagram or a table row; use the filter to highlight a bus. You can download the pinout as PNG or SVG.

CH32V002F4P6 – pinout (TSSOP20)CH32V002F4P6 – pinout (TSSOP20)chiptron.eu · CC BY 4.0CH32V002F4P6TSSOP20 1 PD4 A7 T2CH1ETR 2 PD5 A5 TX 3 PD6 A6 RX 4 PD7 T2CH4 NRST 5 PA1 A1 T1CH2 OSCI 6 PA2 A0 T1CH2N OSCO 7 VSS 8 PD0 T1CH1N 9 VDD → Power 3.3 V or 5 V 10 PC0 T2CH3 20 PD3 A4 T2CH2 19 PD2 A3 T1CH1 18 PD1 T1CH3N SWIO 17 PC7 MISO 16 PC6 MOSI 15 PC5 SCK 14 PC4 A2 T1CH4 13 PC3 T1CH3 12 PC2 SCL 11 PC1 SDA GPIO UART I2C SPI ADC (analog) PWM Power Ground (GND)
Download:PNGSVG
Pin table – CH32V002F4P6
PinNameDirectionUARTI2CSPIPWMADCRemapNote
1PD4input/outputT2CH1ETRA71: T1ETR; 3: T1CH4; 4: SCK, T1ETR; 5: T1ETR; 6: T1ETR; 7: T2CH2; 9: RTS
2PD5input/outputTXA51: RX; 3: T2CH4; 4: MISO; 9: CTS
3PD6input/outputRXA61: TX; 3: T2CH3; 4: MOSI
4PD7input/outputT2CH41: T2CH4; 4: CTS; 5: CTSReset (NRST) by default; usable as GPIO only after switching in the option bytes (RST_MODE = 11)
5PA1input/outputT1CH2A11: T1CH2; 5: SCK, T2CH2; 6: T2CH2; 8: RX; 9: T1CH2Krystal (OSCI)
6PA2input/outputT1CH2NA01: ADC trigger (ADC_IETR), T1CH2N; 4: T1CH2N; 5: MOSI, T1CH2N, T2CH3; 6: T1CH2N, T2CH3; 7: T2CH3; 9: T1CH3Krystal (OSCO)
7VSS–
8PD0input/outputT1CH1N1: SDA, T1CH1N; 2: TX; 4: T1CH3N; 5: T1CH3N; 6: T1CH3N
9VDDinputPower 3.3 V or 5 V
10PC0input/outputT2CH31: NSS, T2CH3; 2: T1CH3; 3: MOSI, TX; 4: T2CH1ETR; 7: T1CH1N; 9: T1CH1N
11PC1input/outputSDANSS1: T2CH1ETR; 2: T1BKIN, T2CH4; 3: T1BKIN, T2CH1ETR, RX; 4: T2CH2; 5: NSS; 7: T1CH2N; 9: T1CH2N
12PC2input/outputSCL1: ADC trigger (ADC_RETR), T1BKIN; 2: T2CH2, RTS; 3: T1ETR; 7: T1CH3N; 9: T1CH3NUSART RTS; T1BKIN
13PC3input/outputT1CH31: T1CH3; 2: T1CH1N, CTS; 3: T1CH1N; 4: T2CH3; 5: T1CH3
14PC4input/outputT1CH4A21: T1CH4; 2: NSS, T1CH2N; 3: T1CH1; 6: NSS; 7: T1CH1; 8: T1CH1; 9: RXclock output (MCO)
15PC5input/outputSCK1: SCK; 2: SCL, T1ETR, T2CH1ETR; 3: T1CH3; 6: TX; 7: T1CH2; 8: T1CH2T1ETR
16PC6input/outputMOSI1: MOSI, CTS; 2: SDA, T1CH1; 3: T1CH3N, CTS; 6: RX; 7: T1CH3; 8: T1CH3
17PC7input/outputMISO1: MISO, RTS; 2: T1CH2; 3: T1CH2, T2CH2, RTS; 6: MISO, CTS; 7: T1CH4, CTS; 8: T1CH4
18PD1input/outputT1CH3N1: SCL, T1CH3N; 2: T1CH3N, RX; 4: SDA, T1CH4, TX; 5: T1CH4, RXProgramming and debugging (SWIO, single wire – WCH-LinkE); ADC trigger (ADC_IETR)
19PD2input/outputT1CH1A31: T1CH1; 2: SCK, T2CH3; 3: T1CH2N; 8: CTS
20PD3input/outputT2CH2A41: T2CH2; 2: MOSI, T1CH4; 4: NSS; 7: T2CH1ETR; 8: RTSUSART CTS; ADC trigger (ADC_RETR)

What to watch out for

  • PD1 is the SWIO programming pin – leave it free.
  • PD7 is reset (NRST) from the factory – free it up as GPIO in the option bytes (RST_MODE = 11).
  • Logic levels follow the supply voltage (3.3 V or 5 V).
  • With an external crystal, PA1 and PA2 are taken.

CH32V articles on chiptron.eu/

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